Recently, I noticed that a FOUP, which used to ship wafer, is insulator.(please see below photo)( )
I measured its E-field in our manufacturing area using field meter, and found out that E-field is over +2kV/inch. It’s really great value, especially there are wafer inside the FOUP, the larger the E-field generated, the more the charge be induced.
Based on this finding(high E-field), I measured the wafer’s(wafers inside the FOUP) voltage using contact voltage meter(CVM), the value is from +300V to +100V(there are many wafer inside FOUP).
Question:
In wafer level, is there have any document mention its ESD sensitivity level?
I just follow ANSI/ESDA S20.20 standard to control this wafers to below ±35V using ionizer ?
Or I just follow ANSI/ESDA S20.20 standard to control FOUP to below E-field < ±125V/inch ?
4.Why standard have its limitation to control E-field to below ±125V/inch?
Looking forward to hearing form you, thank you!
Bruce
This is a good question. There are some people who believe that wafers themselves are not sensitive to ESD. Not because the devices are not sensitive but because you cannot discharge to them as yet.
If this is not the case, then you need to consider how to dissipate the charge on the wafer after it get removed from the FOUP. A field itself would not cause a problem unless the devices was grounded to connected to a conductor at a different potential. If the process can be made to ensure that does not happen, then the field may not have to get eliminated.
If that cannot be assured, then use whatever means to eliminate the field.
There is seldom document or research on how wafer inside the (insulator material) foup will get damaged by induced electrical field when not grouded well nowadays.
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