ESDS device damaged by high peak current or by its narrow rise time?

Dear all,

ESDS device have to be tested its performance after CDM test, and CDM test is the test, which generate E-field and induce charge on device under test. Then, pogo pin touch down the desired pin and finally have a current displayed on scope.

I am wondering that :

  1. Which parameter of current is the main reason that cause damage to device under test?
  2. Is the peak current we should refer to ?
  3. Or it maybe the fast rise time of the current that device could not endure?


Hi Bruce,

In my experience the majority of CDM fails is caused by the overvoltage, that builts up along the parasitic resistances of metal lines and components as a result of the peak current. Only, when metal lines become very long (and their inductances become noticeable) or when protection elements are triggering slowly (e.g. SCRs), CDM fails may be triggered by the current slew rate (di/dt).


Hi Tom,

Appreciate your feedback, Thank you!